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1 of 29 052300 features measures four channels of data: ? integrated 8-bit temperature sensor, ? integrated 8-bit analog-to-digital converter (adc) with a three input mux for measuring up to three external sensors digital thermometer measures temperature -40 c to +85 c in 0.5 c increments (-40 f to +183.2 f in 0.9 f increments) digital thermometer provides 2 c accuracy real time clock/calendar in bcd format counts seconds, minutes, hours, date, month, day of the week, and year with leap year compensation. the real time clock is fully y2k-compliant automatically wakes up and measures temperature and/or adc data at user- programmable intervals from 1 to 255 minutes 2048-byte datalog memory records long-term temperature histogram in 63 bins with 2.0 c resolution records long-term adc data histogram in 64 bins with 4-bit resolution/bin (32 mv/bin) for adc channel one programmable temperature-high and -low alarm trip points programmable adc data-high and -low alarm trip points records time stamp and duration when temperature or adc channel 1 data leaves the interval specified by the trip points two serial interface options: synchronous and asynchronous - 3-wire synchronous serial interface - asynchronous serial interface compatible with standard uarts memory partitioned into 32 byte pages for packetizing data on-chip 16-bit crc generator to safeguard data read operations in asynchronous communications mode unique, factory lasered 64-bit serial number pin assignment pin description v bat - battery supply x1 - crystal input x2 - crystal output ainx - analog in inspec - in-specification output outspec - out-of-specification output int - interrupt output gnd - digital ground agnd - analog ground st - start/status input rst - 3-wire reset input i/o - 3-wire input/output sclk - 3-wire clock input tx - transmit output rx - receive input comsel - communication select v cc - +5v supply ordering information DS1616 24-pin dip DS1616s 24-pin soic DS1616 temperature and three input mux?ed 8-bit data recorde r www.dalsemi.com 1 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 v bat v cc a in3 int comsel rx tx sclk i/o rst st outspec inspec a in1 x2 x1 15 16 10 9 a in2 nc a gnd 13 14 12 11 n/c nc gnd gnd gnd DS1616 24-pin dip (600 mil) DS1616s 24-pin soic (300 mil) preliminary
DS1616 2 of 29 description the DS1616 is an integrated temperature/data recorder. it combines a real time clock (rtc), temperature sensor, and a three input mux?ed 8-bit analog-to-digital converter (adc). datalogging is supported for all four data channels and the and histogram functionality is supported for the temperature sensor and adc channel 1 only. a programmable sample rate feature makes the device ideal for applications requiring datalogging over short or long time frames. the rtc provides seconds, minutes, hours, day, date, month, and year information with leap year compensation, year 2000 compliance, and also provides an alarm interrupt. temperature measurement is provided via integrated thermal technology which can measure temperatures from -40 c to +85 c in 0.5 c increments. an integrated three input mux?ed 8-bit adc allows the device to record data from other types of sensors. the datalog function simply samples data at a user-defined sample rate and writes the data to the datalog memory. a total of 2048 bytes of data may be recorded. if only one data channel is selected, a total of 2048 samples can be recorded for that channel. if two channels are enabled, each channel can record 1024 samples. if three or four channels are enabled, each channel can record 512 samples. in the case of only three channels enabled, the location corresponding to the disabled channel will be 0 to allow the roll- over function to work smoothly. histogram functionality is provided for the thermal sensor and adc channel 1, and is implemented by sampling the data and then incrementing the count value in a data bin associated with that value. the DS1616 provides 63 2-byte data bins in 2 c increments for the temperature channel and 64 2-byte data bins in 4-bit resolution steps (32mv/bin) for the adc data channel 1. the sampling rate can be programmed at intervals ranging from once per minute to once every 255 minutes. the DS1616 provides programmable high- and low-temperature alarm trip points that allow the device to monitor whether the temperature stays within desired limits. likewise, high- and low- trip points can be programmed for the adc data. the device can drive an interrupt or status pin if the adc data falls outside of the programmable limits. the temperature sensor and channel 1 of the adc can also have any event that falls outside of the programmed limits recorded with a time and date stamp and the duration of the out-of-limits condition for additional analysis in the alarm memory. the DS1616 can be programmed to begin sampling data via a pushbutton input or via a command sent over the serial interface by a host machine. a 64-bit serial number is available for unique product identification and tracking. overview the block diagram in figure 1 shows the relationship between the major control and memory sections of the DS1616. the device has six major data components: 1) real time clock and control blocks, 2) 32-byte user nv ram with 64-bit lasered serial number, 3) 96 bytes of alarm event/duration memory, 4) 128 bytes of temperature histogram ram, 5) 128 bytes of adc channel 1 data histogram ram, and 6) 2048 bytes of datalog memory. all memory is arranged in a single linear address space.
DS1616 3 of 29 DS1616 block diagram figure 1 signal descriptions the following paragraphs describe the function of each pin. v cc - v cc is a +5 volt input supply. communication with the DS1616 can take place only when v cc is connected to a +5 volt supply. v bat - battery input for standard lithium cell or other energy source. all functions of the DS1616 with the exception of the serial interface circuitry are powered by v bat when v cc < v bat . all functions are powered by v cc when v cc > v bat . if a battery or other energy source is not used, v bat should be connected directly to gnd. gnd - gnd connections are not internally connected, so all gnd connections must be connected directly to ground. agnd - analog ground should be connected directly to digital ground externally to eliminate ground noise and potential differences. comsel (communication select input) - this pin determines whether serial communication is asynchronous or synchronous. when pulled high to v cc , communication is synchronous and will take place via the sclk, i/o, and rst pins. when comsel is tied to ground, asynchronous communication utilizing the tx and rx pins is selected. if this pin is floated, the DS1616 will operate in the asynchronous communications mode since the comsel pin has a weak internal pulldown resistor. oscillator and divider x1 x2 a/d converter control logic datalog memory histogram memory alarm time stamp and duration logging memory user nvram rtc and control registers internal rtc and control registers serial interface memory function control tx rx st inspec outspec int comsel i/o rst sclk optional serial number ain temperature sensor 3 to 1 mux
DS1616 4 of 29 tx (transmit output) - transmit output of the asynchronous serial interface. tx is tri-stated whenever v cc < v bat . rx (receive input) - receive input of the asynchronous serial interface. sclk (3-wire serial clock input) - the sclk pin is the serial clock input for the 3-wire synchronous communications channel. i/o (3-wire input/output) - the i/o pin is the data input/output signal for the 3-wire synchronous communications channel. rst (3-wire reset input) - the rst pin is the communications reset pin for the 3-wire synchronous communications channel. nt i (interrupt output) - the int pin is an open drain active low output that can be connected to an interrupt input of a microprocessor. the int output remains low as long as the status bit causing the interrupt is present and the corresponding interrupt-enable bit is set. inspec (open drain in-specification output) - this pin, in conjunction with the outspec pin, is used to signal the status of the operation and data of the DS1616. outspec (open drain out-of-specification output) - this pin, in conjunction with the inspec pin, is used to signal the status of the operation and data of the DS1616. st (start/status button input) - the st pin provides two functions. first, when enabled as the datalog start source (se bit in control 1 register is a logic 1), the st pin is used to instruct the DS1616 to begin recording data based on the programmed start delay and data sample rate. the st pin must be held low for at least 0.5 seconds for a datalog mission to begin. secondly, the st pin can be used to poll the status of the recorded data. after datalogging has begun, the st pin instructs the DS1616 to report the status of the recorded data via the inspec and outspec pins. ain1, ain2, ain3 (analog inputs) - the ainx pins are the mux?ed inputs to the adc. x1, x2 - connections for a standard 32.768 khz quartz crystal, daiwa part number dt-26s or equivalent. for greatest accuracy, the DS1616 must be used with a crystal that has a specified load capacitance of 6 pf. there is no need for external capacitors or resistors. note: x1 and x2 are very high impedance nodes. it is recommended that they and the crystal be guard-ringed with ground and that high frequency signals be kept away from the crystal area. for more information on crystal selection and crystal layout considerations, please consult application note 58, ?crystal considerations with dallas real time clocks.? nc (no connect) - these pins should be left unconnected or tied to ground.
DS1616 5 of 29 memory the memory map in figure 2a shows the general organization of the DS1616. as can be seen in the figure, the device is segmented into 32-byte pages. pages 0 and 1 contain the real time clock and control registers (see figure 2b for more detail). the user nv ram resides in page 2. pages 17 to 19 are assigned to storing the alarm time stamps and durations and pages 64 to 71 are reserved for histogram memory. the data logging memory covers pages 128 to 191. memory pages 3 to 16, 20 to 63, 68 to 127, and 192 and up are reserved for future extensions. the end user can write only to the real time clock and control registers and the user nv ram. the rest of the memory map is read-only from the end user?s perspective. DS1616 memory map figure 2a 0000h to 003fh rtc and control registers pages 0 and 1 0040h to 0005fh user nv ram page 2 0060h to 0217h (reserved for future extensions) page 3 to page 16 (excluding last 8 bytes of page 16) 0218h to 021fh serial number page 16 (last 8 bytes) 00220h to 027fh alarm time stamps and durations page 17 to page 19 0280h to 07ffh (reserved for future extensions) page 20 - 63 0800h to 087fh temperature histogram (63 bins of 2 bytes each) page 64 to page 67 0880h to 08ffh adc channel 1 data histogram (64 bins of 2 bytes each) page 68 to page 71 0900h to 0fffh (reserved for future extensions) page 72 - 127 1000h to 17ffh datalog memory (64 pages) page 128 to page 191 1800h and higher (reserved for future extensions) page 192 and higher
DS1616 6 of 29 DS1616 rtc and control page figure 2b addr. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 function 00 0 10 seconds single seconds 01 0 10 minutes single minutes 02 0 12/24 10 h a/p 10 h single hours 030 0 000 day of week 04 0 0 10 date single date 05 y2k 0 0 10 m. single months 06 10 years single years real- time clock registers 07 ms 10 seconds alarm single seconds alarm 08 mm 10 minutes alarm single minutes alarm 09 mh 12/24 10 ha. a/p 10 h. alm. single hours alarm 0a md 0 0 0 0 day of week alarm real- time clock alarm 0b low temperature threshold 0c high temperature threshold temperature alarm 0d number of minutes between temperature conversions sample rate 0e eosc clr 0 se ro tlie thie aie control 1 0f (reads 00h) reserved 10 (reads 00h) reserved 11 current temperature temperature 12 start delay register (lsb) start delay 13 start delay register (msb) start delay 14 dr mem clr mip sip lobat tlf thf almf status 1 15 minutes 16 hours 17 date 18 y2k month 19 year start time stamp 1a low byte 1b medium byte 1c high byte current samples counter 1d low byte 1e medium byte 1f high byte total samples counter 20 current adc channel 1 data sensor input 1 21 current adc channel 2 data sensor input 2 22 current adc channel 3 data sensor input 3 23 low adc channel 1 data threshold adc data 24 high adc channel 1 data threshold ch1 alarm 25 low adc channel 2 data threshold adc data 26 high adc channel 2 data threshold ch2 alarm 27 low adc channel 3 data threshold adc data 28 high adc channel 3 data threshold ch3 alarm 29 0 cs0 (temp) cs1 (adc 1) cs2 (adc 2) cs3 (adc 3) alie ahie 0 control 2 2a 0 alf1 ahf1 alf2 ahf2 alf3 ahf3 0 status 2 2b-3f (reads 00h) reserved
DS1616 7 of 29 DS1616 alarm time stamps and durations for the thermal sensor and adc channel 1 figure 2c address register 220 t1 low samples counter lsb 221 t1 low samples counter 222 t1 low samples counter msb 223 t1 low duration 224 233 234 t6 low samples counter lsb 235 t6 low samples counter 236 t6 low samples counter msb 237 t6 low duration 238 t1 high samples counter lsb 239 t1 high samples counter 23a t1 high samples counter msb 23b t1 high duration 23c 24b 24c t6 high samples counter lsb 24d t6 high samples counter 24e t6 high samples counter msb 24f t6 high duration 250 d1 low samples counter lsb 251 d1 low samples counter 252 d1 low samples counter msb 253 d1 low duration 254 263 264 d6 low samples counter lsb 265 d6 low samples counter 266 d6 low samples counter msb 267 d6 low duration 268 d1 high samples counter lsb 269 d1 high samples counter 26a d1 high samples counter msb 26b d1 high duration 26c 27b 27c d6 high samples counter lsb 27d d6 high samples counter 27e d6 high samples counter msb 27f d6 high samples duration
DS1616 8 of 29 DS1616 temperature histogram data bins figure 2d address register 800 -40c data bin (lsb) 801 -40c data bin (msb) 802 -38c data bin (lsb) 803 -38c data bin (lsb) 804 87b 87c 82c data bin (lsb) 87d 82c data bin (msb) 87e 84c data bin (lsb) 87f 84c data bin (msb) DS1616 adc data histogram data bins figure 2e address register 880 channel 1 code 00-03h data bin (lsb) 881 channel 1 code 00-03h data bin (msb) 882 channel 1 code 04-07h data bin (lsb) 883 channel 1 code 04-07h data bin (msb) 884 8fb 8fc channel 1 code f8-fbh data bin (lsb) 8fd channel 1 code f8-fbh data bin (msb) 8fe channel 1 code fc-ffh data bin (lsb) 8ff channel 1 code fc-ffh data bin (msb) thermal sensor the key to temperature monitoring in the DS1616 is an integrated thermal sensor. the thermal sensor can measure temperature from -40 c to +85 c in 0.5 c increments (fahrenheit equivalent is -40 f to +183.2 f in 1.8 f increments). the thermal sensor provides an accuracy of 2 c. the thermal sensor is enabled by setting the cs0 bit of the control 2 register to a logic 1. if the cs0 bit is a logic 0, the thermal sensor will not be activated during a datalogging mission or for an individual read data command. if cs0 = 0, the value in the current temperature register will be 11111111b. the format of temperature data is defined such that the temperature value is maintained in a single byte of data. table 1 illustrates the format of the temperature data byte format. the values of t[7..0] range from 00000000b (for -40 c) to 11111010b (for +85 c). each increment in the value of t[7..0] represents an increase in temperature of 0.5 c. the following simple formula can be used to translate the temperature data byte value into degrees celsius: c = 0.5(t[7..0]) - 40
DS1616 9 of 29 temperature data byte format table 1 msb lsb t7 t6 t5 t4 t3 t2 t1 t0 when a datalog mission has been initiated and the thermal sensor is enabled (cs0=1), the DS1616 provides temperature recording at regular intervals. however, the device also allows for immediate temperature sensing upon a user?s command when the device is not currently on a datalog mission and the thermal sensor is enabled (cs0=1). this is accomplished by issuing the read data command to the DS1616 over the serial interface. the most recently recorded temperature value is written to the current temperature register, regardless of whether that value was recorded from a datalog mission or from the issuance of the read data command. the status of the contents of this register is provided by the data ready (dr) bit in the status 1 register. if dr is a logic 1, the data is valid. if dr is a logic 0, the data may not be reliable. if cs0 in the control 2 register is a 0 such that the thermal sensor is disabled, the value in the current temperature register will be 11111111b. the read data command will not output this byte of data. during a datalog mission, the dr bit is cleared to a logic 0 when a temperature conversion has been initiated and is set to a logic 1 upon the completion of the conversion. likewise, the dr bit is cleared immediately after the read data command is issued and is set to a logic 1 upon the completion of the conversion. the read data command will only read the values in the current temperature/adc data that have been enabled by the csx[03] bits in the control 2 register. analog-to-digital converter (adc) the DS1616 contains an integrated 8-bit adc with a 3 to 1 input mux to allow multiple sensors to be monitored. an on-chip voltage reference is also provided by an integrated band gap circuit (2.04v 3%). the adc input voltage must not be greater than the battery voltage. an analog-to-digital conversion is the process of assigning a digital value to an analog input voltage. this code represents the input value as a fraction of the full scale voltage (fsv) range. thus the fsv range is then divided by the adc into 256 codes (8 bits). the fsv range is bounded by an upper limit equal to the reference voltage and the lower limit which is ground. the 2.04v (typical) bandgap reference provides a resolution of 8mv between codes. an input voltage equal to the reference voltage converts to ffh while an input voltage equal to ground converts to 00h. the relative linearity of the adc is 0.5 lsb. when a datalog mission has been initiated and one or more of the analog inputs are enabled (cs[1-3] = 1), the DS1616 provides data conversion and recording at regular intervals. however, the device also allows for immediate data conversion upon a user?s command when the device is not currently performing a conversion and one or more of the analog inputs are enabled (cs[1-3] = 1). this is accomplished by issuing the read data command to the DS1616 over the serial interface. the most recently recorded data value is written to the current data register that corresponds to the analog channel(s) that is(are) enabled, regardless of whether that value was recorded from a datalog mission or from the issuance of the read data command. the status of the contents of this register is provided by the data ready (dr) bit in the status 1 register. if dr is a logic 1, the data is valid. if dr is a logic 0, the data may not be reliable. if a channel is not enabled, cs[1-3] is a logic 0, the contents of the corresponding current data register will be 00000000b and not outputted when a read data command is issued.
DS1616 10 of 29 during a datalog mission, the dr bit is cleared to a logic 0 when a data conversion has been initiated and is set to a logic 1 upon the completion of the conversion. likewise, the dr bit is cleared immediately after the read data command is issued and is set to a logic 1 upon the completion of the conversion. data logging when the DS1616 datalogging function is enabled, the device is said to be on a ?datalog mission? until the datalogging is stopped. during a datalog mission, temperature and/or adc samples are successively written to the datalog memory pages. these memory pages are located at addresses 1000h to 17ffh. the end user can program the DS1616 to record data from all four data channels or just one channel. channel selection is determined by the setting the channel select bits (cs0, cs1, cs2 and cs3) in the control 2 register to the appropriate states. a 1 in the csx bit will enable the channel and allow the results to be reported, while a 0 will disable the channel, prevent its data from being recorded, prevent the data from being reported by the read data command, and set the contents of the memory location for the current data register corresponding to that channel to a constant value, all 1s for the thermal sensor or all 0s for the adc channels. when 3 or 4 data channels are selected, the first data sample is written to address location 1000h, the second is written to address location 1001h. the address is incremented with each additional data sample, with samples alternating between the enabled channels. the second sample is always measured immediately after the completion of the first measurement with the third and forth samples following the second. the order of the sampling is the same as the order of the channel select registers. cs0 will be sampled first, if it is enabled, followed by cs1, cs2 and cs3 if they are enabled. any disabled channels will be skipped. a total of 2048 registers have been reserved for datalog data, providing a total of 512 samples for each channel. when three out of the four channels are enabled, a fourth byte of all 0s will be recorded in the datalog memory after the three bytes of data from the enabled channels in order to allow the data to rollover and remain in the correct positions. without the extra, unused data byte, the channel?s memory location would switch between even and odd sections, and there would be two extra bytes at the end of the first 682 samples recorded in the datalog memory. this would cause the first rollover to occur in the middle of a datalog for the three channels. this would make finding a given channels data very difficult after a few rollovers after a few rollovers. when two data channels are selected, the first data sample is written to address location 1000h and the second is then written to address location 1001h. the address is incremented with each additional data sample, with samples alternating between the enabled channels. the second sample is always measured immediately after the completion of the first measurement. a total of 2048 registers have been reserved for datalog data, providing a total of 1024 samples each channel. if just one data channel is selected, the entire datalog memory is dedicated to that one channel and therefore a total of 2048 samples can be recorded. a datalog mission can be initiated via two different methods: by a host instruction over the serial interface or by a pushbutton input. when the se bit in the control 1 register is cleared to a logic 0, the start function of the st pin is disabled and writing any non-0 value to the sample rate register will start a mission. when the se bit is set to a logic 1, the pushbutton method of starting a mission is enabled.
DS1616 11 of 29 under this mode of operation, the DS1616 will begin a datalog mission when a non-0 value has been written to the sample rate register and the st pin has been held low for at least 0.5 seconds. the sample rate during a datalog mission is equal to the value written to the sample rate register multiplied by one minute. writing a 0 to the mip bit in the status 1 register completes the mission. upon initiation of datalog mission by either method, the DS1616 will do two things: 1. the inspec and outspec pins will generate four low pulses simultaneously. 2. the mission-in-progress (mip) bit in the status 1 register is set to a 1. the time at which the first datalog sample is measured is dependent upon the value in the start delay registers. the two-byte start delay register provide a method for the end user to program a delay before sampling commences. the delay is roughly equal to the value in the start delay register times one minute. for example, if the start delay register contain a value of 10, then the device will begin recording data approximately ten minutes after it received either the pushbutton start signal or start instruction. the start delay register are located at addresses 0012h and 0013h, with register 0012h being the lsb and register 0013h being the msb. the start delay register decrements every time the seconds register rolls over from 59 to 00. when this start delay register contains a 00, the first datalog sample will be taken when the seconds register rolls over from 59 to 00. the user has two options for dealing with the potential occurrence of a data overrun (i.e., more than 2048 total data samples). the first option is to enable the rollover feature of the DS1616. this is accomplished by setting the rollover bit (bit 3 of the control 1 register) to 1. when the rollover feature is enabled, new data is written over previous data, starting with address 1000h. for example, if the datalog memory has been completely filled (i.e., 2048 data samples have been recorded) the next data sample will be written to address location 1000h and the address pointer will be incremented with each successive data sample. the second option for dealing with data overrun is to simply stop recording data after the datalog memory has been completely used. in other words, the DS1616 will stop recording data values after 2048 data samples. this feature is enabled by disabling the rollover feature. (bit 3 of the control 1 register) set to 0. it should be noted that during a datalog mission, a time stamp for the first sample is recorded, but is not included for each subsequent sample. however, the time of acquisition for any data sample is easily determined by considering the start time, the sample rate, the value in the current sample counter, and the address of the particular data sample in the datalog memory. if no rollover has occurred in the datalog memory, the sample time associated with any particular data point can be calculated by multiplying the address of the data by the sample rate and adding that to the stored start time value. if the rollover feature has been enabled, the user can determine if rollover has occurred by reading the value in the current samples register. this register counts the total number of samples that have been acquired. if this value is greater than 07ffh (decimal 2047) then the user knows that rollover has occurred. if rollover has occurred, the user needs to determine how many times rollover occurred in determining the sample time for any particular data sample. as a safety measure, the DS1616 has been designed such that the end user cannot write to the datalog memory. this prevents the falsification of datalog data by writing values to datalog registers.
DS1616 12 of 29 data histogram while on a datalog mission, the DS1616 also records a histogram of the temperature and/or adc channel 1 data. the temperature histogram is provided by a series of 63 2-byte ?data bins? that are located in the temperature histogram memory pages (addresses 0800h to 087fh). each bin consists of a 16-bit binary counter that is incremented each time an acquired temperature value falls into the range of the bin. the least significant byte of each bin is stored at the lower address. bin 0 begins at memory address 0800h, bin 1 at 0802h, and so on up to 087ch for bin 62. see figure 2d for temperature histogram address map. likewise, the adc channel 1data histogram is provided by a series of 64 2-byte ?data bins? that are located in the adc data histogram memory pages (addresses 0880h to 08ffh). each data bin represents four adc codes (32mv/bin). for example, bin 0 counts the frequency of adc codes from 00-03h. bin 1 counts the frequency of adc codes from 04-07h, and so on. see figure 2e for adc data histogram address map. after a temperature and/or adc conversion is completed, the number of the bin to be updated is determined by dropping the two least significant bits of the binary data value. for example, bin 0 of the temperature histogram will be updated with every temperature reading from -40 c to -38.5 c. in the same way, bin 1 is associated with the range of -38 c to -36.5 c. bin 62, finally, counts temperature values in the range of +84 c to +85.0 c. since the device will not generate temperature values higher than 85.0 c, bin 62 covers only three temperature values. the memory for a potential 64 th bin exists, but will always read 0s. since each data bin contains 2 bytes, a total of 65,535 samples can be accumulated. if more samples are measured, the data bin will remain at the maximum value. in other words, the data bin value will not roll- over in the event of an overrun. alarm logging for some applications it may be essential to record exactly when a data sample exceeds a predefined tolerance band and for how long the violation remained. the thermal sensor (cs1) and adc channel 1 (cs2) are equipped with the alarm logging feature. the adc channels 2 & 3 do not have the logging feature, but they still have the alarm feature and the ability to trigger an interrupt. if an out of tolerance condition occurs on channels 2 or 3, the time and duration can be calculated from the memory if the memory has not rolled over since the alarm. a tolerance band is specified by means of the temperature alarm registers (addresses 000bh and 000ch) and the adc data alarm [1-3] registers (addresses 0024h to 0029h). see figure 2b for more details on the memory mapping. one can set a high and a low threshold. as long as the data samples stay within the tolerance bands (i.e., are higher than the low threshold and lower than the high threshold), the DS1616 will not record any alarm. if the temperature violates the temperature band, the DS1616 will generate an alarm and set either the temperature-high flag (thf) or the temperature-low flag (tlf) in the status 1 register (address 0014h). in addition, the device generates a time stamp of when the alarm occurred and records the duration of the alarming condition. the int pin will be asserted by a high temperature alarm if the temperature-high interrupt enable (thie) is set and will be asserted by a low temperature alarm if the temperature-low interrupt enable (tlie) is set.
DS1616 13 of 29 likewise, if adc channel 1 data measurement violates the adc data band, either the adc data-high 1 or data-low 1 flag (ahf1 or alf1) will be set, a time stamp will be generated, and the duration of the violation will be recorded. the int pin will be asserted by a high-alarm if the adc data-high interrupt enable (ahie) is set and will be asserted by a low-alarm if the adc data-low interrupt enable (alie) is set. the device stores a time stamp of a violating condition by copying contents of the 3-byte current samples counter when the alarm occurred. the least significant byte is stored at the lower address. one address higher than a time stamp, the DS1616 maintains a 1-byte duration counter that stores the number of times the data was found to be beyond the threshold. if this counter has reached its limit after 255 consecutive data readings and the data has not yet returned to a level within the tolerance band, the device will issue another time stamp at the next higher address and open another counter to record the duration. if the data returns to normal before the counter has reached its limit, the duration counter of the particular time stamp will not increment any further. should the data again cross this threshold, new time stamp will be recorded and its associated counter will increment with each data reading outside the tolerance band. this algorithm is implemented for the low- as well as for the high- thresholds. time stamps and durations for low-temperature violations are stored in the registers 0220h to 0237h (24 bytes) and registers 0238h to 024fh (24 bytes) are reserved for high-temperature violations. registers 0250h to 0267h are reserved for low-adc channel 1 data violations and registers 0268h to 027fh are reserved for high-adc channel 1 data violations. this allocation allows the recording of 24 individual alarm events and periods (six each for high- temperature, low-temperature, high-adc channel 1 data, and low-adc channel 1 data violations). the date and time of each of these periods can be determined from the start time stamp and the time sample rate. figure 2c illustrates the alarm time stamps and durations registers. inspec and outspec pins two special output pins, inspec and outspec , are intended to output the status of the DS1616. more specifically, these pins can be used to control the illumination of leds. for example, the inspec pin can be used to pulse a green led and the outspec pin can be used to pulse a red led. when the end user starts a datalog mission or polls the device for information, one or both of these pins will be pulsed four times. depending on the status of the device, both pins will be pulsed simultaneously or just one pin will be pulsed at a time. each pulse is 62.5 ms in duration and will start every half second. see figures 8 and 9 for further details. the inspec and outspec pins are used to provide visual feedback to the end user in the following situations: 1. datalog mission start when a datalog mission is first initiated, the inspec and outspec pins will generate four low pulses simultaneously to give the end user a visual indication that a datalog mission has begun. 2. request for status of data
DS1616 14 of 29 following a user request for the status of recorded data, the inspec pin will generate four low pulses if the recorded data is within the user-defined limits (as set in the threshold registers). if the recorded temperature data contains any readings that fall outside of these high- and low-temperature thresholds or if the recorded adc data from any of the three adc channels that are enabled contains any readings that fall outside of these high- and low-adc channel [1-3] data thresholds, the outspec pin will be pulsed four times. if the request comes after the mission has started (i.e., mip = 1), but before the first sample has been recorded, the inspec and outspec pins will generate a total of four low pulses alternately, starting with the outspec pin. the DS1616 provides two methods for the user to request the status of the data. the first method is to send the specification test command over the serial interface. the second method is by holding the st pin low for at least half a second after the datalogger has already been started. clock, calendar, and alarm the time and calendar information is accessed by reading/writing the appropriate register bytes. note that some bits are set to 0. these bits will always read 0 regardless of how they are written. the contents of the time, calendar, and alarm registers are in the binary-coded decimal (bcd) format and year 2000 compliant. the real time clock (rtc) can be read at any time and the values used in other parts of the system outside the data logger by issuing a read page command for memory page 0. see figure 2c for more details on the rtc memory map. the DS1616 can run in either 12-hour or 24-hour mode. bit 6 of the hours register is defined as the 12- or 24-hour mode select bit. when high, the 12-hour mode is selected. in the 12-hour mode, bit 5 is the am/pm bit with logic 1 being pm. in the 24-hour mode, bit 5 is the second 10-hour bit (20-23 hours). the DS1616 also contains a time of day alarm. the alarm registers are located in registers 0007h to 000ah. bit 7 of each of the alarm registers are mask bits (see table 2). when all of the mask bits are logic 0, an alarm will occur once per week when the values stored in timekeeping registers 0000h to 0003h match the values stored in the time of day alarm registers. an alarm will be generated every day when mask bit of the day alarm register is set to 1. an alarm will be generated every hour when the day and hour alarm mask bits are set to 1. similarly, an alarm will be generated every minute when the day, hour, and minute alarm mask bits are set to 1. when day, hour, minute, and seconds alarm mask bits are set to 1, an alarm will occur every second. as a security measure to prevent unauthorized tampering, changing any value in the rtc and control registers (with the exception of the status registers) will stop a datalog mission and clear the mission-in- progress (mip) bit.
DS1616 15 of 29 time of day alarm bits table 2 alarm register mask bits (bit 7) seconds ms minutes mm hours mh days md 1 1 1 1 alarm once per second 0 1 1 1 alarm when seconds match 0 0 1 1 alarm when minutes and seconds match 0 0 0 1 alarm when hours, minutes, and seconds match 0 0 0 0 alarm when day, hours, minutes, and seconds match special purpose registers the following description defines the operation of the special function registers of the DS1616. control 1 register msb lsb eosc clr 0 se ro tlie thie aie eosc - enable oscillator - this bit controls the state of the oscillator in battery back-up mode only. when set to logic 0, the oscillator is active. when this bit is set to a logic 1, the oscillator is stopped and the DS1616 is placed into a low-power standby mode with a current drain of less than 100 nanoamps at room temperature. when vcc is applied or when mip =1, the oscillator is active regardless of the state of this bit. clr - clear enable - this bit enables the clear memory command. when this bit is set to a 1 and the clear memory command is subsequently issued, the datalog, histogram, temperature alarm, current samples, start time stamp, start delay, sample rate register, and adc data alarm are all cleared to 0. following the issuing of the clear memory command, the clr bit is also cleared to 0. if the clear enable bit is set, but a command other than the clear memory command is issued next, the clr bit is cleared to a 0 and the contents of the datalog, histogram, temperature alarms, current samples registers, start delay, sample rate, and adc data alarm register are unchanged. se - start enable - this bit enables the ?start? function of the st input. when se is a logic 1, the st input is enabled as the start pin for datalogging operation. when enabled, datalogging operation begins when the sample rate register contains a non-0 value and the st pin has been held low for at least 0.5 seconds. when se is a logic 0, writing any non-0 value to the sample rate register will start datalogging operation. once datalog operation has been initiated, the first data sample occurs after the specified delay written to the start delay register has elapsed. ro - roll-over - this bit determines whether the datalog function of the DS1616 rolls over or stops writing data to the datalog memory in the event that the datalog memory is completely filled. if ro is set to a 1, the datalog memory will ?roll over? after all 2048 registers in the datalog memory have been used. in other words, after the 2048 th register is written, the following sample will be written to register 0000, overwriting the original data. likewise, subsequent samples will increment through the datalog registers, overwriting their data.
DS1616 16 of 29 if ro is cleared to a 0, no further data samples will be written to the datalog memory after all datalog memory registers have been filled. samples, however, will continue to be taken and the appropriate histogram registers will be incremented with each sample. likewise, the temperature and adc data alarms will also continue to function. tlie - temperature low interrupt enable - when set to a logic 1, this bit permits the temperature low flag (tlf) in the status 1 register to assert int . when the tlie bit is set to logic 0, the tlf bit does not initiate the int signal. thie - temperature high interrupt enable - when set to a logic 1, this bit permits the temperature high flag (thf) in the status 1 register to assert int . when the thie bit is set to logic 0, the thf bit does not initiate the int signal. aie - alarm interrupt enable - when set to a logic 1, this bit permits the alarm flag (almf) in the status 1 register to assert int . when the aie bit is set to logic 0, the almf bit does not initiate the int signal. status 1 register msb lsb dr mem clr mip sip lobat tlf thf almf dr - data ready - this bit indicates the status of the data value in the current temperature and/or adc data [1-3] registers after the read data command has been executed. when this bit is a logic 1, the DS1616 has completed the measurement of all of the selected channels (csx = 1) and has written valid value(s) to the current temperature and/or current adc data [1-3] registers. when this bit is a logic 0, the measurements have not been completed. this bit is cleared to 0 when the read data command is sent. mem clr - memory cleared - this bit indicates that the datalog memory, histogram memory, temperature alarm, adc channel 1 data alarm, current samples, start time stamp, start delay, and sample rate registers are all cleared to 0. mem clr is cleared to 0 when a datalog mission is started (i.e., mip = 1). mip - mission in progress - this bit indicates the sampling status of the DS1616. if mip is a logic 1, the device is currently on a ?mission? in which it is operating in the data logging mode. the mip bit is changed to a logic 1 immediately following 1) the writing of a non-0 value to the sample rate register when the se bit is a 0 or 2) a falling edge on the st pin if the sample rate register contains a non-0 value and the se bit is a 1. if mip is a logic 0, the DS1616 is not currently in datalogging mode. the mip bit transitions from a logic 1 to a logic 0 whenever datalogging is stopped. datalogging is stopped when the DS1616 is cleared via the clear bit and clear instruction or when any of the rtc or control registers (with the exception of the status registers) are written to during a mission. the mip bit can also be written to a logic 0 by the end user to stop datalogging. it cannot, however, be written to a logic 1.
DS1616 17 of 29 sip - sample in progress - this bit indicates that the DS1616 is currently in the process of acquiring a temperature and/or adc sample. when the sip bit is 0, a data conversion is not currently in process and the next conversion will not begin for at least 250 ms. when the sip bit is a 1, a data conversion is in progress and no registers or memory locations should be read or written. the sip bit will be a 1 for a maximum of 750 ms. lobat - low battery flag - this bit reflects the status of the backup power source connected to the v bat pin. a logic 1 for this bit indicates an exhausted lithium energy source. tlf - temperature low flag - a logic 1 in the temperature low flag bit indicates that the temperature is/has been less than or equal to the value in the temperature low threshold register. if tlie is also a logic 1, the int pin will go low. tlf is cleared by writing this bit to a logic 0. the clear memory command has no effect on this bit. thf - temperature high flag - a logic 1 in the temperature high flag bit indicates that the temperature is/has been greater than or equal to the value in the temperature high threshold register. if thie is also a logic 1, the int pin will go low. thf is cleared by writing this bit to a logic 0. the clear memory command has no effect on this bit. almf - alarm flag - a logic 1 in the alarm flag bit indicates that the current time has matched the time of day alarm registers. if the aie bit is also a logic 1, the int pin will go low. almf is cleared by writing this bit to a logic 0. the clear memory command has no effect on this bit. sample rate register msb lsb sr7 sr6 sr5 sr4 sr3 sr2 sr1 sr0 the data sample rate for the DS1616 can range from once per minute to once per 255 minutes. the rate is equal to the value written to the sample rate register multiplied by one minute. this register can only be written to a new value when the mem clr bit in the status 1 register is set to 1. in other words, once a datalog mission has started, it cannot be changed without first issuing the clear memory command. the sample rate register is cleared by issuing the clear memory command. start delay resister msb lsb d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 the start delay register determines the amount of delay before the DS1616 begins to take data measurements. the amount of the delay is roughly equal to the value in the register multiplied by one minute. if the register contains 00h, the first sample will begin when the seconds register rolls over from 59 to 00.
DS1616 18 of 29 the value in this register decrements each time the seconds register rolls over from 59 to 00 until the start delay register reaches a value of 00h. temperature-high threshold register msb lsb th7 th6 th5 th4 th3 th2 th1 th0 this register determines the high threshold for interrupt generation from the thermal sensor. if the temperature is greater than or equal to the value in this register, an interrupt will be activated if the temperature high interrupt enable (thie) bit is set to a logic 1. temperature-low threshold register msb lsb tl7 tl6 tl5 tl4 tl3 tl2 tl1 tl0 this register determines the low threshold for interrupt generation from the thermal sensor. if the temperature is less than or equal to the value in this register, an interrupt will be activated if the temperature low interrupt enable (tlie) bit is set to a logic 1. current temperature register msb lsb ct7 ct6 ct5 ct4 ct3 ct2 ct1 ct0 this register provides the most recently acquired temperature measurement if the cs0 bit in the control 2 register is set to 1. otherwise, the value will be all 1s and will not be reported by the read data command. it contains either the most recently measured sample from automatic datalogging or it contains data that was acquired in response to a user?s instruction for an immediate temperature measurement. when the ds1615 is not on a mission, an immediate measurement is acquired by issuing the read data command with cs0 set to 1. after issuing the read data command, the value in this register is valid only if the data ready (dr) bit in the status 1 register is a logic 1. current samples counter this 3-byte register set provides the number of samples that have been logged during the current data logging operation (also known as a ?mission?). the contents of this register can be used by software to point to the most recent data sample in the datalog nv ram. the data in these registers are cleared by enabling and issuing the clear memory command. total samples counter this three-byte register set provides the total number of data samples that have been logged during the life of the product. this value cannot be written by the end user. the value in this register is maintained as long as the lithium energy source is available. current adc data registers [1-3] msb lsb ca7 ca6 ca5 ca4 ca3 ca2 ca1 ca0
DS1616 19 of 29 these registers provide the most recently acquired adc inputs. for the adc channels that are enabled with the cs[1-3] bits in the control 2 register set to 1. otherwise, the value in the corresponding current adc data [1-3] register will be all 0s and not reported by the read data command. it contains either the most recently measured sample from automatic datalogging or it contains data that was acquired in response to a user?s instruction for an immediate adc conversion. when the DS1616 is not on a mission, an immediate measurement is acquired by issuing the read data command with csx set to a 1. after issuing the read data command, the value in this register is valid only if the data ready (dr) bit in the status 2 register is a logic 1. adc data-high threshold registers [1-3] msb lsb ah7 ah6 ah5 ah4 ah3 ah2 ah1 ah0 these registers determines the high threshold for interrupt generation from the three mux?ed adc inputs. if the data is greater than or equal to the value in the corresponding register, an interrupt will be activated if the data high interrupt enable (ahie) bit is set to a logic 1. adc data-low threshold registers [1-3] msb lsb al7 al6 al5 al4 al3 al2 al1 al0 these registers determines the low threshold for interrupt generation from the three mux?ed adc inputs. if the data is less than or equal to the value in the corresponding register, an interrupt will be activated if the data low interrupt enable (alie) bit is set to a logic 1. control 2 register msb lsb 0 cs0 cs1 cs2 cs3 alie ahie 0 csx - channel select [0-3] - the value of these bits determines which channels are enabled. a 1 in the csx bit enables the channel for data collection, recording and reporting. a 0 in the csx bit disables the channel so data will not be taken, recorded, or reported. this causes a common problem in retrieving data, if the csx bit is set to 0, the datalog and histogram data will not be downloaded from the DS1616. alie - adc data low interrupt enable - when set to a logic 1, this bit permits the adc data low flag [1-3] (alfx[1-3]) in the status 2 register to assert int . when the alie bit is set to logic 0, the alf bit does not initiate the int signal. ahie - adc data high interrupt enable - when set to a logic 1, this bit permits the adc data high flag [1-3] (ahfx[1-3]) in the status 2 register to assert int . when the ahie bit is set to logic 0, the ahf bit does not initiate the int signal.
DS1616 20 of 29 status 2 register msb lsb 0 alf1 ahf1 alf2 ahf2 alf3 ahf3 0 alfx - adc data low flag [1-3] - a logic 1 in the adc data low flag [1-3] bits indicate that the adc channel [1-3] data from the corresponding channel is/has been less than or equal to the value in the corresponding adc data low threshold [1-3] register. if alie is also a logic 1, the int pin will go low. alfx is cleared by writing this bit to a logic 0. the clear memory command has no affect on this bit. ahfx - adc data high flag [1-3] - a logic 1 in the adc data high flag [1-3] bits indicate that the corresponding adc channel [1-3] data is/has been greater than or equal to the value in the corresponding adc data high threshold [1-3] register. if ahie is also a logic 1, the int pin will go low. ahfx is cleared by writing this bit to a logic 0. the clear memory command has no effect on this bit. silicon serial number a unique 64-bit lasered serial number is located in the register bank. this serial number is divided into three parts. the first byte contains a model number to identify the device type (19h). the next six registers contain a unique binary number. the last serial number byte contains a crc byte used to validate the data in the first seven serial number registers. all 8 bytes of the serial number are read-only registers. the DS1616 is manufactured such that no two devices will contain an identical serial number. blocks of numbers can be reserved by the customer. contact dallas semiconductor for special ordering information for devices with reserved blocks of serial numbers. security the DS1616 provides several measures to insure data integrity for the end user. these security measures are intended to prevent third party intermediaries from tampering with the data that has been stored in the datalog and histogram memory. as a first security measure, the datalog and histogram memory are read-only from the perspective of the end user. the DS1616 can write sampled data into these memory banks, but the end user cannot write data to individual registers. this prevents an unscrupulous intermediary from writing false data to the DS1616. the end user, however, can clear the contents of the datalog and histogram memory. this is accomplished by enabling and issuing the clear memory command. a second security feature lies in the fact that once the sample rate has been selected by writing to the sample rate register, it cannot be changed to another value without resetting the recorded data. this prevents gathering many data samples at a fast sample rate and then lowering the sample rate to give the appearance that the data was recorded over a longer period of time. the sample rate register can only be written to a new value if the mem clr bit is set to 1. a third security feature lies in the two integrated sample counters, the current samples counter and the total samples counter. these two counters can be used to guarantee that the DS1616 data has not been cleared at any time during a given period of time. the current samples counter counts the number of samples that have occurred since the most recent data acquisition operation was started (i.e., the number
DS1616 21 of 29 of samples since the sample rate register was written to a non-0 value). the total samples counter counts the total number of samples that have been recorded in the life of the device (assuming the lithium energy source has not been removed during that time). if the end user knows the value in the total samples counter before the data acquisition operation is started, he can guarantee that the DS1616 has not been cleared. if the current samples count equals the difference between the ending value and beginning value of the total samples counter, then the DS1616 data has not been cleared during that time frame. as a fourth security measure, changing any value in the rtc and control registers (with the exception of the status registers) will stop datalogging and clear the mission-in-progress (mip) bit. serial interface the DS1616 provides two different serial communications options; asynchronous and synchronous. both communications options transmit the data lsb first/msb last. the mode of communication is selected via the comsel pin. when this pin is pulled high, the DS1616 operates in synchronous mode. in this mode, communication with the DS1616 is facilitated by the sclk, i/o, and rst pins. when comsel is pulled low or floated, asynchronous communications is selected and communication with the device occurs over the tx and rx pins. the operation of each mode is discussed in further detail below. asynchronous communication in asynchronous mode, the DS1616 operates as a slave peripheral device which is read and written over a half duplex asynchronous data interface at the fixed rate of 9,600 bits per second. data is received and transmitted in 8-bit bytes using a standard asynchronous serial communications format as shown in figure 3. this format is easily generated by the uart in most systems. the DS1616 data format implements 10-bit words including 1 start bit, 8 data bits, and 1 stop bit. data is received by the DS1616 on the rx pin and transmitted by the tx pin. communication word format figure 3 synchronous communication synchronous communication is accomplished over the 3-wire bus which is composed of three signals. these are the rst (reset), the sclk (serial clock), and i/o (data i/o) pins. the 3-wire bus operates at a maximum data rate of 2 mbps. all data transfers are initiated by driving the rst input high and are terminated by driving rst low. (see figures 6 and 7.) a clock cycle is a sequence of a falling edge followed by a rising edge. for data inputs, the data must be valid during the rising edge. data bits are output on the falling edge of the clock and remain valid through the rising edge. when reading data from the DS1616, the i/o pin goes to a high impedance state when the clock is high. taking rst low will terminate any communication and cause the i/o pin to go to a high impedance state. d0 d1 d2 d3 d4 d5 d6 d7 start bit data bits stop bit
DS1616 22 of 29 general communications format communication with the DS1616 in both synchronous and asynchronous modes is accomplished by first writing a command to the device. the command is then followed by the parameters and/or data required by the command. the command set for the DS1616 can be seen in table 3. reads and writes to the DS1616 differ in that writes are performed one byte at a time while reads are performed in page long (up to 32-byte) bursts. writing 1 byte at a time simply means that a write command has to be issued before each byte of data that is written. for example, writing to the user nv ram requires that the write user nv ram command be written followed by the address to be written and then the actual data byte. writing a second data byte would require the same procedure with a new address specified. reads, however, are accomplished in bursts. for example, if an end user wants to read data from a specific page he would first issue the read page command, followed by the address to begin reading. after the DS1616 receives the command and starting address, it will immediately transmit the data that resides at the given address location. however, rather than stop with that single byte of data, the DS1616 will continue transmitting the next byte of data and will continue transmitting data until the page boundary is reached. a page read can begin at any address, but will always end at the page boundary. thus, a page read can range from 1 to 32 bytes. it should be noted that a read can be terminated at any time when communicating in synchronous mode by pulling rst to ground. however, in asynchronous mode, the DS1616 will not stop transmitting data until the page boundary is reached. cyclical redundancy check (crc) when communicating in the asynchronous mode, a 16-bit crc is transmitted by the DS1616 following the transmission of all data. when communicating in synchronous mode, no crc is transmitted. the 16-bit crc (cyclical redundancy check) is used to insure the accuracy of the data that is read from the DS1616. the crc is generated according to the standardized crc16-polynomial function x 16 + x 15 + x 2 + 1. figure 4 illustrates the function of the generator. the crc is generated by clearing the crc generator and then shifting in data from the register set being read. a 16-bit crc is transmitted by the DS1616 after the last register of any page of memory is read. in other words, a crc is generated at the end boundary of every page that is read. the crc is transmitted starting with bit 15 and ending with bit 0. crc hardware description and polynomial figure 4 bit0 bit1 bit2 bit3 bit4 bit5 bit6 bit7 bit8 bit9 xor xor xor bit10 bit11 bit12 bit13 bit14 bit15 crc output input data x 0 x 1 x 8 x 9 x 11 x 12 x 10 x 13 x 14 x 15 x 2 x 3 x 4 x 5 x 6 x 7 polynomial = x 16 + x 15 + x 2 + 1 x 16
DS1616 23 of 29 communication reset (asynchronous mode) when transmitting the command, parameters, or data to the DS1616, it is possible that communication might be interrupted. for example, the user might accidentally disconnect the cable linking the device to the host computer. to insure that communication always starts at a known state when in the asynchronous mode, the DS1616 will reset the communication if it senses a problem. this is accomplished via two methods. first, if during the transmission of a byte of data to the DS1616, the stop bit is not received, communication will be reset. the lack of a valid stop bit indicates that that particular byte of data was not received correctly. second, if more then 10-bit times expire between the reception of 1 byte of data and the reception of the next required byte, then communication will be reset. automatic resetting of communication is not required when communicating in the synchronous mode. this is because of the function of the rst pin. pulling rst low resets the serial communication of the DS1616. DS1616 commands all communication with the DS1616 is accomplished by writing a command to the device followed by parameter byte/s if required. table 3 illustrates the commands supported by the DS1616. the DS1616 commands are summarized below. note that if an invalid command is issued, no action is taken by the device. DS1616 commands table 3 command function description 22h write byte write 1 byte to rtc, control registers, and user nv ram 33h read page read page 44h specification test poll status of temperature and/or adc data extremes 55h read data instructs DS1616 to immediately measure the temperature (if cs0 = 1) and/or perform an analog to digital conversion on the adc channels selected (if cs[1-3] = 1) and store the result in the current temperature and/or current adc channel [1-3] register(s) when mip = 0. a5h clear memory this command clears the datalog, histogram, temperature alarm, adc channel 1 alarm, current samples, start time stamp, start delay, and sample rate registers when the clear enable bit (clr) in the control 1 register is set to a 1. 1. write byte (22h) host transmit: d7 d6 d5 d4 d3 d2 d1 d0 00100010 0 a6a5a4a3a2a1a0 d7 d6 d5 d4 d3 d2 d1 d0 DS1616 response: none note that good programming practice insists that the clear memory command should be issued whenever the DS1616 is programmed to begin a new datalogging mission.
DS1616 24 of 29 2. read page (33h) host transmit: d7 d6 d5 d4 d3 d2 d1 d0 00110011 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 DS1616 response (host receives): d7 d6 d5 d4 d3 d2 d1 d0 register a[15..0] register xxxh where xxx represents the last register of the page that has been accessed. when in asynchronous mode, the tx pin becomes inactive after the last register in the page and the crc have been transmitted. in synchronous mode, the DS1616 will continue to transmit data as long as clocks are presented to the serial interface. if clocks are presented after the final data bit of the last register in the page, the DS1616 will wraparound to the first register in the page and sequentially transmit data as long as the clocks continue. 3. specification test (44h) host transmit: d7 d6 d5 d4 d3 d2 d1 d0 01000100 DS1616 response (host receives): either the inspec or outspec pin will generate four low pulses. each pulse will be 62.5 ms in duration and will start every half-second. this command instructs the DS1616 to generate four low pulses on either the inspec or outspec led driver pins. the pin that is driven is dependent upon whether any data samples fell outside of the high- and low-temperature threshold or the high- and low-adc data boundaries. these pins, when used to drive leds, can be used to provide a quick visual confirmation as to whether the samples remained within the user-defined limits. note that the specification test command is ignored if the st button is pulled to ground when the command is issued. 4. read data (55h) host transmit: d7 d6 d5 d4 d3 d2 d1 d0 01010101 DS1616 response (host receives): when the device is not currently data logging (i.e., mip = 0), the temperature and/or the analog input(s) is/are immediately converted and the value(s) is/are written to the current temperature and/or current adc channel [1-3] data registers. the channels that are enabled is determined by the csx bits of the control 2 register set to 1.
DS1616 25 of 29 the data value(s) obtained from this command is/are not stored in the datalog or histogram memory. after this command has been executed, the user must read the data ready (dr) bit in the status 1 register to determine if the measurements have been completed. if the dr bit is a logic 1, the measurement has been completed and the value(s) in the current temperature and/or current adc channel [1-3] registers is/are valid. if the dr bit is a logic 0, the measurements have not been completed. this command functions only when mip = 0 (i.e., the device is not currently datalogging). if mip =1, the DS1616 takes no action in response to the command. 5. clear memory (a5h) host transmit: d7 d6 d5 d4 d3 d2 d1 d0 10100101 DS1616 response: the contents of the datalog, histogram, temperature alarm, adc channel 1 alarm, current samples, start time stamp, start delay, sample rate, and adc data alarm registers are cleared if the clear memory command has been enabled by setting the clr bit in the control 1 register to a one. after clearing the memory, the mem clr bit in the status 1 register is set. the clear memory command functions only if the oscillator is active. the DS1616 is inaccessible for 500 s after the clear memory command has been issued.
DS1616 26 of 29 absolute maximum ratings* voltage on vdd, relative to ground -0.3v to +7v voltage on any other pin, relative to ground -0.3v to +7v operating temperature -55c to +125c storage temperature -55c to +125c soldering temperature see j-std-020a specification * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions (-40 c to +85 c) parameter symbol min typ max units notes power supply voltage v cc 4.0 5.0 5.5 v 1 input logic 1 v ih 2.2 v cc +0.3 v 1 input logic 0 v il -0.3 +0.8 v 1 battery voltage v bat 2.7 90% of v cc v1 dc electrical characteristics (-40 c to +85 c) parameter symbol min typ max units notes input leakage i li -1 +1 a input leakage comsel pin i lic 55 100 a logic 1 output v oh 2.4 v logic 0 output v ol 0.4 v tx and i/o pins output current @ 2.0v i oh -2.2 ma tx, i/o, and int pins output current @ 0.8v i ol 4ma inspec and outspec output current @ 0.8v i ol 10 ma active supply current i cca 210ma temperature conversion current i tc 600 a adc conversion current i adcc 500 a oscillator current i osc 300 500 na battery standby current (oscillator off) i bat 250 na DS1616 thermometer error t err 2.0 c 6 adc accuracy offset error offset 1 lsb integral non linearity inl 0.25 lsb 9 differential non linearity dnl 0.25 lsb monotonicity 8 bits reference voltage v ref 1.98 2.04 2.10 v 8
DS1616 27 of 29 capacitance (t a = 25 c) parameter symbol min typ max units notes input capacitance c i 10 pf crystal capacitance c x 6pf ac electrical characteristics (-40 c to +85 c; v cc = 5.0v 10%) parameter symbol min typ max units notes delay from st to inspec or outspec active t ss 560 ms delay from specification test command to inspec or outspec active t cs 560 ms temperature and all three adc channels data conversion time (csx = 1) t conv 153 230 ms one adc data channel only conversion time (in response to read data command) cs[1-3]=1 t dconv 110 ms temperature only conversion time (in response to read data command) (cs0 = 1) t tconv 150 200 ms inspec and outspec active low pulse width t sl 62.5 ms inspec and outspec high duration t sh 437.5 ms asynchronous serial interface timing (-40 c to +85 c; vcc = 5.0v 10%) parameter symbol min typ max units notes data rate f bit 9,408 9,600 9,792 bits/sec 2 turnaround time t turn 2/ f bit s
DS1616 28 of 29 synchronous (3-wire) serial interface timing (-40 c to +85 c; vcc = 5.0v 10%) parameter symbol min typ max units notes data to sclk setup t dc 50 ns 3 data to sclk setup t dc 50 ns 3 sclk to data hold t cdh 70 ns 3 sclk to data delay t dd 200 ns 3,4,5 sclk low time t cl 250 ns 3 sclk high time t ch 250 ns 3 sclk frequency t clk dc 2.0 mhz 3 sclk rise and fall t r , t f 500 ns rst to sclk setup t cc 1 s 3 sclk to rst hold t cch 60 ns 3 rst inactive time t cwh 1 s 3 rst to i/o high z t cdz 70 ns 3, 7 sclk to i/o high z t ccz 70 ns 3, 7 notes: 1. all voltages are referenced to ground, 2. the data rate f bit is equal to 1/t bit 3. measured with v ih = 3.0v or v il = 0v. 4. measured at v oh =2.4v or v ol =0.4v. 5. load capacitance = 50 pf. 6. thermometer error reflects temperature error as tested during calibration. 7. sampled with 5 pf load. not 100% tested. 8. the internal reference of 2.04v is set so that the adc will work down to the minimum battery voltage of 2.7v. the adc input voltage must not be greater than the battery voltage. 9. the integral non-linearity does not take into consideration the tolerance of the voltage reference. asynchronous serial interface timing figure 5 rx tx data start stop data start stop t turn t bit t bit
DS1616 29 of 29 synchronous (3-wire) serial interface read timing figure 6 synchronous (3-wire) serial interface write timing figure 7 specification polling from st input figure 8 note: inspec / outspec generate a total of four low pulses. specification polling from command figure 9 note: inspec / outspec generate a total of four low pulses. rst# t cc 0 17 0 17 read command address 0 7 data sclk i/o t dc t cdh t cdd t ccz t cdz rst# t cc 0 17 0 17 write command address sclk i/o t dc t cdh t cl t ch t r t f t cwh t cch data 0 7 inspec outspec st t sl t ss t sh data = 55h start stop rx inspec outspec t sl t cs t sh

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